9:41 AM
0
After you have modified the parameters under STEP 7 and downloaded the

changes to the CPU in RUN mode, the CPU will perform the checks described in

the section CPU Response to Configuration Download in RUN mode and start the

OB80 with event W#16#350A. It will then start OB83 via the startup event

W#16#3367. This indicates to you that, as of now, I/O data of the corresponding

modules may be inconsistent. At this time, SFCs which trigger new jobs for sending

data sets to the respective modules (e.g. SFC57 "PARM_MOD"), are no longer to

be called, as this might cause conflicts in the data records to be transferred

between the system and the user program.

Note

The I/O values of a PCS 7 will be assigned the status "BAD" after this OB83 start.

After the CPU has executed OB83, it transfers the parameter data records. That is,

each respective module will receive all its data records (regardless of the number

of data records affected by your changes).

OB83 is then called again (with startup event W#16#3267, if the send operation

was completed with success, or with W#16#3968 if failed). Processing of this

OB83 does not interrupt any other priority class.

Note

The I/O values of a PCS 7 will be assigned the status "OK" after this OB83 with the

start event W#16#3267.

You may only access process image values that belong to the process image

partition of the currently executed OB.

After the successful transfer of data records, the DP master indicates availability of

the modules with an entry in module status data. If the transfer has failed it

indicates that the modules are not available. In the second case, an I/O access

error will occur when you attempt a direct access to a module (during the update of

the process image input table or during the transfer of the process image output

table to the module. OB85 or OB122 will be called, depending on the type of

access).

The I/O data of the modules respond as after an insertion interrupt, that is,

presently they may still be inconsistent (possibly because the module has not yet

evaluated your data records). However, the restriction that data record SFCs may

not be active for the modules no longer applies.

Note

When the new module configuration disables the diagnostics interrupt, it may

happen that the module will subsequently transmit an interrupt it had already

prepared at this point.

Possible Errors During Reconfiguration

The same error events can occur as those occurring during the transfer of data

records via SFCs:

The module receives the parameter data records, but is unable to evaluate

them.

Fatal errors (especially protocol errors at the DP bus) may initiate the DP

master to disable the corresponding DP slave completely, so that all modules

of this station will no longer be available.

Reconfiguration Depending on CPU Operating Modes

Parameters are reassigned after SDBs have been evaluated (see CPU Response

to Configuration Downloads with CiR) in RUN mode. The active INTF LED is lit

during the reconfiguration.

A transition to HALT mode interrupts the assignment of new parameters.

Assignment will be resumed if the CPU goes into STOP or RUN mode. The only

difference in STOP: OB83 will not be called.

The assignment of new parameters will be aborted if power is lost. After power is

returned, all existing DP stations are assigned new parameters.

Coordination Between Master Systems

A situation may arise in which the sequence

OB83 start (Start event W#16#3567)

Data record transfer

OB83 start (Start event W#16#3467 or 3468)

is performed in a parallel operation at all affected master systems.

0 comments:

Post a Comment

Labels

Actuator Sensor-interface Address Negative Edge Detection Address Positive Edge Detection ADDRESSING ANALOG INPUTS ANALOG OUTPUTS AND Logic Operation AS-i AS-i configuration Assign Authorizations Automation License Manager BASICS Bit Bit Configuration Bit Logic Instructions Block By-passing CiR CiR Modules CiR Objects communication COMPARISON Components Configuration Configuring Connections Conversion Converting Counter CP 343-2 P CP 443-5 Ext CPU CPU 412-1 CPU 412-2 DP CPU 412-2 PCI CPU 414-2 DP CPU 414-3 DP CPU 414-4 H CPU 416-2 DP CPU 416-2 PCI CPU 416-3 DP CPU 416F-2 CPU 417-4 CPU 417-4 H Data Block DI/DO MODULES Diagnosing Diagnosis DIGITAL INPUTS DIGITAL OUTPUTS Downloading DP master English Mnemonics ET 200M Exclusive OR Logic Operation Extended pulse timer fail-safe modules fault FBD Floating- Point Floating-Point Math FUNCTION MODULES German Mnemonics Hardware hmi Input Insert Binary Input install Instructions Integer Math INTERFACE MODULES Jump License License Keys Load Memory Master Control Relay Memory Areas Memory Reset Midline Output Modifying MODULES monitoring variables Move NEG Negate Binary Input Negative RLO Edge Detection Networks Off-delay timer On-delay timer Operating systems OR Logic Operation Output PID Control PLC POS position decoder Positive RLO Edge Detection PROFIBUS Program Control programm Programming Pulse timer RELAY OUTPUTS Remote Reset Output Reset_Set Flip Flop Retentive on-delay timer Rotate RS S5 File S7 Communications S7-300 S7-400 SAVE Save RLO to BR Memory SCADA Set Output Set_Reset Flip Flop Shift siemens SIMATIC SIMATIC Manager Slaves Software SR STATEMENT Status Bit STEP 7 stop mode Time Base Time Value Timer Timer Cell TRAINING MODULE Units Upgrading UPLOADING WinLC RTX Word Logic Work Memory XOR