# : Midline Output
Parameter | Data Type | Memory Area | Description |
<address> | BOOL | I, Q, M, D, *L | The address specifies the bit to which the RLO will be assigned. |
* You can only use an address in the local data stack if it is declared in the variable declaration table in the TEMP area of a code block (FC, FB, OB).
Description
The Midline Output instruction is an intermediate element that buffers the RLO. More precisely, this element buffers the bit logic operation of the last branch to be opened before the Midline Output.
The Midline Output instruction is is affected by the Master Control Relay (MCR). For more detailed information about how the MCR functions, refer to MCR on/off.
You can create a negated Midline Output by negating the input of the Midline
Output.
Status Word
| BR | CC 1 | CC 0 | OV | OS | OR | STA | RLO | FC |
writes | - | - | - | - | - | 0 | X | - | 1 |
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