& : AND Logic Operation
Parameter | Data Type | Memory Area | Description |
<address> | BOOL | I, Q, M, T, C, D, L | The address indicates the bit whose signal state will be checked. |
Description
With the AND instruction, you can check the signal states of two or more specified addresses at the inputs of an AND box.
If the signal state of all operands is 1, the condition is satisfied and the instruction provides the result 1. If the signal state of an address is 0, the condition is not satisfied and the instruction produces the result 0.
If the AND instruction is the first instruction in a string of logic operations, it saves the result of its signal state check in the RLO bit.
Every AND instruction that is not the first instruction in the string of logic
operations, combines the result of its signal state check with the value stored in the
RLO bit. These values are combined according to the AND truth table.
Status Word
| BR | CC 1 | CC 0 | OV | OS | OR | STA | RLO | FC |
writes | - | - | - | - | - | X | X | X | 1 |
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